------------------------------------------------
  Build Assembler
  ------------------------------------------------ 
     * The assembler "compiles" Neotoma assembly language instructions 
       to Neotoma MCU microcode program memory and data memory.
     
     $ cd ./assembler
     $ make


  ------------------------------------------------
  Verification simulations System and Block Level
  ------------------------------------------------
     * All simulations are self checking and report PASS / FAIL
     * All simulations have command line argument to run as console only or to invoke the GUI waveform editor
     * Includes system level MCU verification simulations running demonstration assembly language programs
     * Includes block level RTL verifcation simulations

     $ cd ./rtl/verif_dtb
     $ ./run_verif_all.sh


  -------------------------------------------------------------------------
  Build MCU with demo application to run on Basys3 FPGA developement board
  -------------------------------------------------------------------------
     $ cd ./rtl/systems/basys3/demo_1 
     $ ./run_build_batch_non_project_mode.sh   # Build in console mode (no Vivado GUI)
     1. This compiles the assembly language demo program in ./asm/ into microcode and 
        builds the FPGA bitstream with the program preloaded into program and data memory
     3. Use the Digilent Adept Windows application (or Linux equivanelt) to program the 
       bitstream at ./xilinx_build_dir/design.bit onto the Basys3 FPGA. The MCU will begin
       executing the demo program immideately after FPGA programming.